Package / Case  

FPBGA-484

Surface Mount  

YES

Supplier Device Package  

484-FPBGA (23x23)

Number of Terminals  

484

RoHS  

N

Mounting Styles  

SMD/SMT

Core  

ARM Cortex M3

Maximum Clock Frequency  

80 MHz

L1 Cache Instruction Memory  

-

L1 Cache Data Memory  

-

Data RAM Size  

64 kB

Number of Logic Elements  

2000 LE

Number of I/Os  

161 I/O

Minimum Operating Temperature  

0 C

Maximum Operating Temperature  

+ 85 C

Moisture Sensitive  

Yes

Number of Logic Array Blocks - LABs  

-

Factory Pack QuantityFactory Pack Quantity  

60

Tradename  

SmartFusion

Package  

Tray

Base Product Number  

A2F200

Mfr  

Microchip Technology

Product Status  

Active

Package Description  

BGA, BGA484,26X26,40

Package Style  

GRID ARRAY

Moisture Sensitivity Levels  

3

Package Body Material  

PLASTIC/EPOXY

Package Equivalence Code  

BGA484,26X26,40

Supply Voltage-Nom  

1.5 V

Reflow Temperature-Max (s)  

30

Supply Voltage-Min  

1.425 V

Operating Temperature-Max  

85 °C

Rohs Code  

No

Manufacturer Part Number  

A2F200M3F-FG484

Clock Frequency-Max  

80 MHz

Package Code  

BGA

Package Shape  

SQUARE

Part Life Cycle Code  

Active

Ihs Manufacturer  

MICROSEMI CORP

Supply Voltage-Max  

1.575 V

Risk Rank  

5.24

Packaging  

Tray

Series  

A2F200

Operating Temperature  

0°C ~ 85°C (TJ)

JESD-609 Code  

e0

Terminal Finish  

Tin/Lead (Sn/Pb)

HTS Code  

8542.39.00.01

Technology  

CMOS

Terminal Position  

BOTTOM

Terminal Form  

BALL

Peak Reflow Temperature (Cel)  

225

Terminal Pitch  

1 mm

Reach Compliance Code  

compliant

JESD-30 Code  

S-PBGA-B484

Number of Outputs  

94

Qualification Status  

Not Qualified

Power Supplies  

1.5,1.8,2.5,3.3 V

Temperature Grade  

OTHER

Operating Supply Current  

2 mA

Speed  

80MHz

RAM Size  

64KB

Core Processor  

ARM® Cortex®-M3

Peripherals  

DMA, POR, WDT

Program Memory Size  

256 kB

Connectivity  

EBI/EMI, Ethernet, I²C, SPI, UART/USART

Architecture  

MCU, FPGA

Number of Inputs  

94

Organization  

4608 CLBS, 200000 GATES

Seated Height-Max  

2.44 mm

Programmable Logic Type  

FIELD PROGRAMMABLE GATE ARRAY

Number of Gates  

200000

Speed Grade  

STD

Primary Attributes  

ProASIC®3 FPGA, 200K Gates, 4608 D-Flip-Flops

Number of CLBs  

4608

Number of Logic Cells  

4608

Number of Cores  

1 Core

Number of Equivalent Gates  

200000

Flash Size  

256KB

Width  

23 mm

Length  

23 mm